Responsibilities
- Developing DRC/ERC/Extraction runsets for verification tools like PVS/Calibre/ICV from Scratch
- Mentoring junior team members to achieve thier milestones/goals
- Creating run sets for different variant from Foundry document
- Creating PCELL/Pycell for basic devices for various CAD software’s
- Verifying run sets against deliverable criteria
- Providing completely qualified DRC- Tiling decks for the various technologies/PDK
- Designing and developing all basic device Library including Pcells, Symbols, CDF/Callbacks with other required tool-views and netlisting capability (spice, cdl, spectre ) for all Process Design Kit supported by Various foundries
Requirements
- Qualification BE/ B.Tech (Electronics) , ME/ M.Tech ( VLSI Domain )
- Solid experience of 3-6 yrs as pdk/cad engineer
- Perl/Skill/python/shell knowledge is mandatory
- Experienced in mentoring junior engineers as defining and tracking milestones
- Executed complete flow of PDK development including PCELL | LVS | LVS-PEX & DRC runset development
- Good understanding of IC design flow from Cad tool perspective
- Knowledge of verification cad software I.E. Caliber, PVS, Assura, ICV
- Expert in TCL and SVRF/TVF languages
- Knowledge of UNIX environment required to setup CAD software
- Mastering Cadence SKILL language for automation and device generation
- Knowledge of compact models for circuit simulators
- Good in programming concepts and Data structure
Job Category: PDK Development
Job Type: Full Time Part Time
Job Location: Bengaluru Hyderabad Noida
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